Programmable logic devices (PLDs) exist as a well-known type of integrated circuit (IC) that may be programmed by a user to perform specified logic functions. There are different types of programmable logic devices, such as programmable logic arrays (PLAs) and complex programmable logic devices (CPLDs). One type of programmable logic device, known as a field programmable gate array (FPGA), is very popular because of a superior combination of capacity, flexibility, time-to-market, and cost.
An FPGA typically includes configurable logic blocks (CLBs), programmable input/output blocks (IOBs), and other types of logic blocks, such as, for example, memories, microprocessors, and digital signal processors (DSPs). The CLBs, IOBs, and other logic blocks are interconnected by a programmable interconnect structure. The CLBs, IOBs, logic blocks, and interconnect structure are typically programmed by loading a stream of configuration data (known as a bitstream) into internal configuration memory cells that define how the CLBs, IOBs, logic blocks, and interconnect structure are configured. The FPGA may also include various dedicated logic circuits, such as, for example, digital clock managers (DCMs), input/output (I/O) transceivers, and boundary scan logic.
As semiconductor technology has advanced, the amount and speed of logic available on an IC, such as an FPGA, has increased more rapidly than the number and performance of I/O connections. As a result, IC die stacking techniques have received renewed interest to address the interconnection bottleneck of high-performance systems. In stacked IC applications, two or more ICs are stacked vertically and interconnections are made between them. Such a stacked arrangement is referred to as a system-in-package (SIP).
In a SIP, power supplies may be provided to the “daughter” ICs stacked on a primary IC, such as an FPGA. Typically, the primary IC receives power supplies from a package substrate (also referred to as a carrier substrate). However, in most instances, a daughter IC cannot obtain power directly from the package substrate (e.g., when the daughter IC is flip-chip bonded to the primary IC). In such cases, the daughter IC can be configured to obtain its power supplies from the primary IC itself via their interconnections. However, a particular primary IC cannot meet the various power supply voltage requirements of a wide array of potential daughter ICs. In cases where the primary IC cannot meet the power supply requirements of a desired daughter IC, either the daughter IC cannot be used, or the primary IC and/or the daughter IC must be re-designed to provide/accept compatible power supplies and re-fabricated for integration in a SIP. Re-designing and re-fabricating the primary IC, daughter IC, or both can be cost prohibitive.
Accordingly, there exists a need in the art for programmable heterogeneous integration of stacked semiconductor die that overcomes the aforementioned deficiencies.